Usually, the threshold voltage of a transistor is adjusted by implants. A higher implant dosage increases the threshold voltage of the transistor.
In a standard CMOS (Complementary Metal Oxide Semiconductor) fabrication process, the threshold voltage of a transistor is adjusted by threshold voltage implants together with well implants. Threshold voltage implants are performed under low energy, so that the doping occurs mainly at the surface, while well implants are typically done at high energy levels. FIG. 8 provides an overview of modules and their respective required lithography levels used in a C65LP process.
Transistors with high threshold voltage values, i.e. transistors having a low leakage current may not be suitable for high performance applications. On the other hand, while regular threshold voltage value transistors may be suitable for high performance applications, such devices suffer from higher current leakage.
Fabricating a semiconductor device with transistors having different threshold voltage levels requires additional masks. As an example, a CMOS element fabrication process would require two additional masks, one for the NMOS transistor of the CMOS element and the other for the PMOS transistor of the CMOS element. These additional masks increase the semiconductor processing costs.
It is thus desirable to fabricate transistors with different threshold voltages without additional masks.